stepan
/
preprocessor
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

trunk preprocessor: some cleanups related to sparse mode (removed SimulSparseStatement class and incorporated it into SimulStatement, determine mode at preprocessing time instead of runtime in StochSimulStatement) 

git-svn-id: https://www.dynare.org/svn/dynare/trunk@2595 ac1d8469-bf42-47a9-8791-bf33cf982152
issue#70
sebastien 2009-04-14 15:02:51 +00:00
parent a2da8397f8
commit 7afeae2fca
5 changed files with 34 additions and 80 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

67
ComputingTasks.cc
View File

@ -73,8 +73,8 @@ void ModelInfoStatement::writeOutput(ostream &output, const string &basename) co
}
SimulStatement::SimulStatement(const OptionsList &options_list_arg) :
options_list(options_list_arg)
SimulStatement::SimulStatement(const OptionsList &options_list_arg, ModelTreeMode mode_arg) :
options_list(options_list_arg), mode(mode_arg)
{
}
@ -88,48 +88,32 @@ void
SimulStatement::writeOutput(ostream &output, const string &basename) const
{
options_list.writeOutput(output);
output << "simul(oo_.dr);\n";
}
SimulSparseStatement::SimulSparseStatement(const OptionsList &options_list_arg,
int mode_arg) :
options_list(options_list_arg),
mode(mode_arg)
{
}
void
SimulSparseStatement::checkPass(ModFileStructure &mod_file_struct)
{
mod_file_struct.simul_present = true;
}
void
SimulSparseStatement::writeOutput(ostream &output, const string &basename) const
{
options_list.writeOutput(output);
output << "if (~ options_.initval_file) & (size(oo_.endo_simul,2)<options_.periods)\n";
output << " if ~isfield(options_,'datafile')\n";
output << " make_y_;\n";
output << " make_ex_;\n";
output << " else\n";
output << " read_data_;\n";
output << " end\n";
output << "end\n";
if(mode==eSparseDLLMode)
output << "oo_.endo_simul=simulate;\n";
if (mode == eStandardMode || mode == eDLLMode)
output << "simul(oo_.dr);\n";
else
{
//output << "oo_.endo_simul=" << basename << "_dynamic();\n";
output << basename << "_dynamic;\n";
output << "if (~ options_.initval_file) & (size(oo_.endo_simul,2)<options_.periods)" << endl
<< " if ~isfield(options_,'datafile')" << endl
<< " make_y_;" << endl
<< " make_ex_;" << endl
<< " else" << endl
<< " read_data_;" << endl
<< " end" << endl
<< "end" << endl;
if (mode == eSparseDLLMode)
output << "oo_.endo_simul=simulate;" << endl;
else
output << basename << "_dynamic;" << endl;
output << "dyn2vec;" << endl;
}
output << "dyn2vec;\n";
}
StochSimulStatement::StochSimulStatement(const SymbolList &symbol_list_arg,
const OptionsList &options_list_arg) :
const OptionsList &options_list_arg,
ModelTreeMode mode_arg) :
symbol_list(symbol_list_arg),
options_list(options_list_arg)
options_list(options_list_arg),
mode(mode_arg)
{
}
@ -157,11 +141,10 @@ StochSimulStatement::writeOutput(ostream &output, const string &basename) const
{
options_list.writeOutput(output);
symbol_list.writeOutput("var_list_", output);
output << "if (options_.model_mode == 1 || options_.model_mode == 3)\n";
output << " info = stoch_simul_sparse(var_list_);\n";
output << "else\n";
output << " info = stoch_simul(var_list_);\n";
output << "end\n";
if (mode == eStandardMode || mode == eDLLMode)
output << "info = stoch_simul(var_list_);" << endl;
else
output << "info = stoch_simul_sparse(var_list_);" << endl;
}
ForecastStatement::ForecastStatement(const SymbolList &symbol_list_arg,

18
ComputingTasks.hh
View File

@ -50,19 +50,9 @@ class SimulStatement : public Statement
{
private:
const OptionsList options_list;
const ModelTreeMode mode;
public:
SimulStatement(const OptionsList &options_list_arg);
virtual void checkPass(ModFileStructure &mod_file_struct);
virtual void writeOutput(ostream &output, const string &basename) const;
};
class SimulSparseStatement : public Statement
{
private:
const OptionsList options_list;
const int mode;
public:
SimulSparseStatement(const OptionsList &options_list_arg, int mode_arg);
SimulStatement(const OptionsList &options_list_arg, ModelTreeMode mode_arg);
virtual void checkPass(ModFileStructure &mod_file_struct);
virtual void writeOutput(ostream &output, const string &basename) const;
};
@ -82,9 +72,11 @@ class StochSimulStatement : public Statement
private:
const SymbolList symbol_list;
const OptionsList options_list;
const ModelTreeMode mode;
public:
StochSimulStatement(const SymbolList &symbol_list_arg,
const OptionsList &options_list_arg);
const OptionsList &options_list_arg,
ModelTreeMode mode_arg);
virtual void checkPass(ModFileStructure &mod_file_struct);
virtual void writeOutput(ostream &output, const string &basename) const;
};

4
DynareBison.yy
View File

@ -648,9 +648,9 @@ model_info : MODEL_INFO ';'
;
simul : SIMUL ';'
{ driver.simulate(); }
{ driver.simul(); }
| SIMUL '(' simul_options_list ')' ';'
{ driver.simulate(); }
{ driver.simul(); }
;
simul_options_list : simul_options_list COMMA simul_options

21
ParsingDriver.cc
View File

@ -676,34 +676,18 @@ void ParsingDriver::rplot()
void ParsingDriver::stoch_simul()
{
mod_file->addStatement(new StochSimulStatement(symbol_list, options_list));
mod_file->addStatement(new StochSimulStatement(symbol_list, options_list, mod_file->dynamic_model.mode));
symbol_list.clear();
options_list.clear();
}
void ParsingDriver::simulate()
{
if (mod_file->dynamic_model.mode == eSparseDLLMode || mod_file->dynamic_model.mode == eSparseMode)
simul_sparse();
else
simul();
}
void
ParsingDriver::simul_sparse()
{
mod_file->addStatement(new SimulSparseStatement(options_list, mod_file->dynamic_model.mode));
options_list.clear();
}
void
ParsingDriver::simul()
{
mod_file->addStatement(new SimulStatement(options_list));
mod_file->addStatement(new SimulStatement(options_list, mod_file->dynamic_model.mode));
options_list.clear();
}
void
ParsingDriver::model_info()
{
@ -711,7 +695,6 @@ ParsingDriver::model_info()
options_list.clear();
}
void
ParsingDriver::check()
{

4
ParsingDriver.hh
View File

@ -282,10 +282,6 @@ public:
void rplot();
//! Writes a stock_simul command
void stoch_simul();
//! Determine whether to write simul command or simul_sparse command
void simulate();
//! Writes a simul_sparse command
void simul_sparse();
//! Writes a simul command
void simul();
//! Writes check command